a. Field of the Invention
The present invention pertains generally to tests of computer processors and specifically to strenuously exercising specific portions of processors.
b. Description of the Background
Memory tests are common diagnostic tools used by engineers to test various computer designs. Common memory tests involve writing a known pattern to a block of memory, reading the block again, and evaluating whether or not a bit has changed. A successful test would be one in which every bit was correctly set.
Memory tests are generally performed to validate the proper functionality of the memory. It is critical for the proper function of a computer system that the memory is reliable and as such, each bit that is set in the memory should function exactly as expected. Thus, memory tests generally involve exercising each and every bit and validating proper functioning.
Common practice has been to perform a standard memory test to evaluate the performance of all components involved in handling memory. The assumption was that if the test passed, each component functioned properly, including the processor, internal bus, memory controller, and individual memory components. While this is nominally acceptable, individual elements may not be stressed completely and thus design flaws or component failures may not be fully uncovered.
It would therefore be advantageous to provide a system and method for stressing certain elements such as the memory interfaces of a computer system as completely as possible.